I am soooo glad we are finally getting into good solid technical discussions concerning complex digital mode demodulation! In my personal opinion, focus REALLY needs to be on designing a good solid reproduceable I/Q demodulation method encompassing everything from IF filtering to I and Q outputs. I've thought this for a very long time, actually. And I am speaking to both the hobbyists/experimenters as well as the actual product manufacturers.
Max (KA1RBI), I think your info and summary of the difficulties facing the current scanner designs was excellent! I hadn't thought at all about the AGC issues - good you brought that up!
I can't believe that I/Q demodulation by itself would significantly add to the cost of a consumer scanner but I DO see the final IF filter quality being an issue as well as making a nice tight local oscillator with low phase noise output within acceptable cost range. I think those two issues (final IF filter group delay quality and local oscillator stability and phase noise) will be the biggest hurdles of scanner manufacturers to design with low cost.
For us as experimenters it may be ok to neglect the final IF filter by simply bypassing it for experimental purposes BUT, eventually, for everyday usage a good final IF filter will be needed to deal with adjacent channel and passband noise issues. Also, we will probably need a good external oscillator to take the place of the scanner's (or other receiver's) internal LO. Maybe something like these will work:
Nova Engineering: Products: NovaSource G6. The quality of the internal mixer might also be an issue so we may have to literally take over for the entire final IF chain.
If I were designing this from the ground up I would probably start with a modular approach to make a solid high performance testbed with as high quality parts as could be afforded and obtained. This would be used for concept testing of hardware and software. At the point where understanding of the concepts involved is high enough and where repeatable high performance results are obtained I would then look at where to reduce costs and consolidate/simplify hardware designs. The ultimate goal being a solid design ready for mass production within reasonable cost windows.
Unitrunker, I realize this discussion derailed from your Provoice focus and really belongs in a more general thread (the DSD thread, maybe, or a new one devoted to the hardware aspects of this effort) but I wanted to reply to the issues brought up by MSM_Maria and KA1RBI. Moderators, feel free to divest the non-relevant posts from this thread and move to either a more appropriate existing one or to an entirely new one if necessary. It is not my intention to hijack Unitrunker's real focus!
Unitrunker, I do have a question for you, though, if you don't mind. You mention the "Soft Rock" again as you did in the GRE forums thread about I/Q test points. I followed your link but could not find any descriptive information concerning the product. Could you direct me to where to find such info, details, schematics, block diagrams, operation and usage, etc.? Many thanks in advance!
-Mike